PhD and MSc Theses

PhD and MSc Theses, since 1988

Advisor Professor Avi Mendelson
Advisor's Email mendlson@cs.technion.ac.il
No of theses 37
Department Computer Science
Department Web Site www.cs.technion.ac.il
Student's Name Graduation Year Degree Abstracts Research Name
Verner Uri 2016 PhD Abstracts Processing Real-time Data Streams on GPU-based Systems
Kedar Gil 2017 PhD Abstracts Hardware/Software Co-Design to Minimize Energy in Real-Time Systems
Rotem Efraim 2015 PhD Abstracts High Performance Computing in Physically Constrained Environment
Gabbay Freddy 1999 PhD Speculative Execution Based on Value Prediction
Fuchs Amit 2018 MSc Abstracts Fault-Tolerant Operanting System for Many-Core Processors
Jioussy Rami 2015 MSc Abstracts Enhancing Energy-Performance for Power Constrained SoC Systems
Katzengold Oren 2006 MSc Abstracts Effective Use of Trace Caches
Shavitt Nira 1995 MSc Mapping Dynamic Parallel Programs Into Parallel Systems
Zimerman Offer 1994 MSc Using "Write"Only Cache" for Improring "Cacne Based" Systems
Bar Lev Lior 2019 MSc Abstracts Characterizing a Data Routing Algorithm for Fault Tolerant Real-Time NoC Systems
Liss Natan 2019 MSc Abstracts Neural Network Quantization for Integer-Only Inferencing on an FPGA
Gaizman Natalie 2018 MSc Abstracts CAN Bus Protocol with an Emphasis on the Security Aspect Security Aspect
Nishry Oren 2018 MSc Abstracts PUF:Survey on Physical Unclonable Function Hardware Implementation and Security-Based Application
Baskin Chaim 2017 MSc Abstracts Streaming Architecture for Large-Scale Quantized Neural Networks on an FPGA Based Dataflow Platform
Igra Idan 2014 MSc Abstracts Constructive Conflict Resolution for Transactional Memory
Azriel Leonid 2014 MSc Abstracts Peripheral Memory: Analysis of its Impact on Performance of a General Purpose Computer System
Yuval Gad 2013 MSc Abstracts Architectural Considerations for DSP Processors Supporting Intense Real-Time DSP Applications
Tolchinsky Igor 2012 MSc Abstracts Rethinking Locality in NUMA Systems
Lavro Anton 2011 MSc Abstracts An EDGE Co-Processor for a RISC CPU: Architecture, Performance and Power Analysis
Malits Roman 2011 MSc Abstracts The Potential of Global Scheduling to Improve Utilization in Wide SIMD GPGPU Architectures
Zobel Shmuel 2010 MSc Abstracts Power Performance Tradeoffs in Graphics/GPGPU Based Systems
Damishian Chen 2010 MSc Abstracts Stride Based Dead Block Correlation Prefetcher – A New Long-Latency-Tolerant Data Cache Prefetcher
Sinyuk Konstantin 2009 MSc Abstracts User Driven Virtualization for Mobile Platforms
Geller Ishay 2008 MSc Abstracts Dataflow Trace Cache (DFTC): A Dynamic Translation Processor Architecture for Power-Efficient High-Performance Execution
Sorani Iris 2008 MSc Abstracts Long Instruction Traces and their Usage
Behar Michael 2006 MSc Abstracts Characterization of Hot Traces in Modern Processors
Timor Aviel 2006 MSc Abstracts Using Under-Utilized CPU Resources to Enhance its Reliability
Gendler Alexander 2005 MSc Abstracts A Multi-Prefetcher Mechanism Based on a Prefecher Assessment Buffer (PAB)
Khamaisee Assad 2004 MSc Abstracts Combining Trace Cache with Value Prediction in Microprocessors
Kosyakovsky Oleg 2002 MSc Abstracts Approaches to Managing Trace Cache in Computer Systems
Vinov Michael 1997 MSc The Dynamic Characterization of Fine-Grain Parallelizm and Its Usage for Supporting Multithreaded Architectures
Gabbay Freddy 1996 MSc Tmoesi – a New Cache Coherency Protocol for Distributed Multi-Cache Systems
Menaker Ohad 1996 MSc Survey on Multi-Threaded Implementations
Bekerman Michael 1996 MSc Architecture of Processor with Simultaneous Execution Of Multiple Instruction Streams
Falik Ohad 1995 MSc Improving Data Availability in Advanced Memory Architectures
Ramati Naftali 1995 MSc Developing Fault Injection S-W for R.t. Systems Evaluation
Bitan Avraham 1993 MSc Asymptotic Performance Evaluation of Computer Memory Models